Decoder structures are often complex, computationally expensive and need large internal memory. Multi-level cell (MLC) flash memory cells increase the efficiency of flash memory devices by storing more bits in each cell. However, MLC technology affects the maximum usable endurance and retention of the flash memory. Therefore, design of efficient codes and decoders to achieve performance gain with relatively low complexity is desirable to increase the lifetime and/or performance of MLC-based flash memory devices.